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Overview
ASIC Physical Design Engineer, Library Characterization - Espoo - Bosch - Espoo, Finland
Hardware Design Engineer
Location
Espoo
Remoteness
Onsite
Estimated Expiry
February 3, 2026
Posted: December 30, 2025
Job Type
Full-time
Job Description
Develops and characterizes standard and custom cell libraries for ASICs, supporting physical implementation and ensuring high-quality, validated models for digital subsystems.
Company Information
Technology
Data shown is based on historical job postings from our database.
Job Details
Requirements
- Industry experience in ASIC physical design
- Expertise in library characterization, LVF libraries
- Understanding of analog circuit principles and Spice simulations
- Experience with modern ASIC technology and near-threshold design
- Proficiency with Cadence Liberate or Synopsys SiliconSmart
- Knowledge of STA tools like PrimeTime or Tempus
- Strong scripting skills (Python, TCL, json, jinja 2)
Responsibilities
- Characterize standard and custom cell libraries
- Support physical implementation of ASICs
- Ensure high-quality library models
- Collaborate with design teams
- Improve characterization methodology
Field:
Technology
Education Level
Bachelor
No items to show.
6 days ago
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Overview
ASIC Physical Design Engineer, Library Characterization - Espoo - Bosch - Espoo, Finland
Hardware Design Engineer
Location
Espoo
Remoteness
Onsite
Estimated Expiry
February 3, 2026
Job Type
Full-time
Posted: December 30, 2025
Job Description
Develops and characterizes standard and custom cell libraries for ASICs, supporting physical implementation and ensuring high-quality, validated models for digital subsystems.
Company Information
Bosch
Technology
Data shown is based on historical job postings from our database.
Job Details
Requirements
- Industry experience in ASIC physical design
- Expertise in library characterization, LVF libraries
- Understanding of analog circuit principles and Spice simulations
- Experience with modern ASIC technology and near-threshold design
- Proficiency with Cadence Liberate or Synopsys SiliconSmart
- Knowledge of STA tools like PrimeTime or Tempus
- Strong scripting skills (Python, TCL, json, jinja 2)
Responsibilities
- Characterize standard and custom cell libraries
- Support physical implementation of ASICs
- Ensure high-quality library models
- Collaborate with design teams
- Improve characterization methodology
Field:
Technology
Education Level
Bachelor
No items to show.
6 days ago