Physical Verification Intern

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. 1. Assist in Cadence Genus/Innovus/Tempus (Front-End/Back-End & signoff Design Tool) regular testsuites review and maintainess; 2. Develop testsuites to ensure the good STA quatlity; 3. Ensure the correctness of timing analysis and file change request if met bugs etc.. 1. The candidate should be at school MS; 2. Linux system and scripting skills with TCL or PERL or Shell is preferred; 3. STA & P&R timing knowledge is preferred; 4. Good team player with written and verbal communication skills, and with good patience & responsibility. We’re doing work that matters. Help us solve what others can’t. Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.