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Design, Simulation and Modelling Engineer for Advanced Semiconductor Packaging (SiPFAB) - Tampereen yliopisto - Tampere, Finland

Simulation Engineer

Posted: June 30, 2026
Posted 23 days ago
Last seen in crawl: July 23, 2026 (today)
Application Deadline: August 3, 2026
Location
Remoteness
Role & Management
Role Level:Mid-Level
Management Tier:No People Management
Job Type
Experience
5 years
Required Languages
Optional Languages

Job Description

Tampere University System-in-Package Fabrication (SiPFAB) is now looking for a Simulation Engineer. System-in-Package Fabrication (SiPFAB) is a new infrastructure being established at the Faculty of Information Technology and Communication Sciences (ITC) of Tampere University. Located on the Hervanta campus, SiPFAB focuses on chip packaging, integration, and testing. The pilot line provides a unique environment for combining and testing Wide Bandgap (WBG) chips and various semiconductor components as complete system solutions. SiPFAB enables the development and experimentation of future-oriented, environmentally friendly, and customized packaged chip systems. The infrastructure supports research and pilot-scale development of emerging chip technologies that drive energy-efficient solutions for industrial applications in transportation and energy systems. SiPFAB offers research and development services, piloting opportunities, and expert support across all stages of chip integration and packaging for the industry— from concept to prototype and pre-production. SiPFAB is part of the Chips JU Wide Band Gap Pilot Line, which contributes to the European objective of strengthening the semiconductor technology and manufacturing ecosystem. JOB DESCRIPTION SiPFAB is looking for an experienced Design, Simulation and Modelling Engineer. As a Simulation Engineer specializing in the modelling and simulation of power and RF semiconductor packaging, you will lead the development of SiPFAB’s design, modelling and simulation processes and methods. Working as part of a multidisciplinary team, you will contribute directly to customer projects spanning academia, research institutes, and industry driving the demonstration, maturation, and commercialization of advanced packaging technologies. In this role, you will also play a key part in defining software tools used at SiPFAB, exploring novel AI driven design and simulation methodologies and have the freedom to explore novel solutions for semiconductor packaging applications ensuring a robust and scalable design process for SiPFAB. Your Key Responsibilities - Establishing, developing, and optimizing design, simulation and modelling processes for semiconductor packaging applications - Actively contributing to ongoing and future R&D and customer projects - Engaging and collaborating with academic, RTO, and industrial partners - Establishing Assembly Design Kits - Create, modify, and verify mask layouts for semiconductor packaging processes using industry-standard CAD/layout tools - Selecting, specifying, and procuring software tools - Exploring and developing the use of AI in semiconductor packaging simulation and design - Upkeep of software tooling - Working closely with software vendors to advance simulation and design capability - Training of new users REQUIREMENTS You are a proactive engineer who enjoys problem solving and working with different stakeholders. Required Skills & Experience - M.Sc. or Ph.D. in an applicable field such as Electrical or Process Engineering, Physics, Materials Science or Semiconductor Packaging Technology - At least 5 years of relevant work experience - Proven experience in semiconductor simulation, modelling and/or design - A strong, structured approach to problem solving and troubleshooting - Ability to work effectively in conditions of ambiguity where processes and tools are still evolving - A team player with strong communication and collaboration skills - High attention to detail and process discipline - Fluent spoken and written skills in English Considered as an asset - Experience in the semiconductor or microelectronics industry - Background in pilot-line environments or lab-to-production transitions - Interest in following and understanding trends in the semiconductor packaging industry - Knowledge of the Finnish language Tampere University is a unique, multidisciplinary and boldly forward-looking, evolving community. Our values are openness, diversity, responsibility, courage, critical thinking, erudition, and learner-centeredness. WE OFFER At SiPFAB, you will be working at the forefront of European semiconductor development and manufacturing initiatives. We offer a high-autonomy environment designed for proactive, self-driven engineers and opportunities for substantial impact and visibility within both the organization and wider ecosystem. In addition, we offer direct collaboration with researchers, industry partners, and the semiconductor community. As a member of staff at Tampere University, you will enjoy a range of competitive benefits, such as a flexible work schedule, good facilities for teleworking, occupational healthcare services, a variety of affordable food and drink outlets across our campuses and a personal fund to spend on sports and cultural activities in your free time. The positions will be filled on permanent basis, commencing preferably as soon as possible mutually agreed. A trial period of six months applies to all our new employees. The salary will be based on both the job requirements and the employee's personal performance in accordance with the Finnish Unversity Salary System. The official job title for the selected candidate will be Specialist. The position of Specialist is placed at requirement levels 8-10 in the salary system (Other Expert and Support Staff). HOW TO APPLY The appointment decision is contingent on the completion of the security clearance vetting procedure to ensure the employee’s integrity and reliability. With the appointee’s consent, Finnish Security and Intelligence Services will conduct a security clearance vetting in accordance with the Security Clearance Act (726/2014). Please submit your application through our online recruitment system. The closing date for applications is 3.8.2026 at 23:59 (Finnish time EEST / UTC +3). Applications and all accompanying documentation must be in English.

Company Information

Tampereen yliopisto logo
Korkea-asteen koulutus yliopistoissa ja ammattikorkeakouluissa
Listing: Education
Kalevantie 4, 33014 Tampereen Yliopisto
Business ID: 0155668-4
Current open roles at Tampereen yliopisto on JobCrawls
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string1
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Assistant Professor1
null1
Mid-level1

Tampereen yliopisto appears in 1,059 indexed job postings in JobCrawls' Finland dataset since October 2023. In that historical index, the strongest location signals for this employer are Tampere, Finland, Remote - Global, and Remote - Finland.

Data shown is based on historical job postings from our database.

Job Details

Responsibilities

  • Establishing, developing, and optimizing design, simulation and modelling processes for semiconductor packaging
  • Contributing to R&D and customer projects
  • Collaborating with academic, RTO, and industrial partners
  • Establishing Assembly Design Kits
  • Creating, modifying, and verifying mask layouts using CAD/layout tools
  • Selecting, specifying, and procuring software tools
  • Developing the use of AI in semiconductor packaging simulation and design
  • Upkeep of software tooling
  • Working with software vendors to advance simulation and design capability
  • Training new users

Requirements

  • M.Sc. or Ph.D. in Electrical or Process Engineering, Physics, Materials Science or Semiconductor Packaging Technology
  • At least 5 years of relevant work experience
  • Proven experience in semiconductor simulation, modelling and/or design
  • Strong, structured approach to problem solving and troubleshooting
  • Ability to work effectively in conditions of ambiguity
  • Strong communication and collaboration skills
  • High attention to detail and process discipline
  • Fluent spoken and written English

Skills & Technologies

Semiconductor SimulationModellingCAD/Layout toolsAI in DesignRF Semiconductor PackagingPower Semiconductor Packaging

Education Level

Masters

Recruitment Process

  1. 1
    Security clearance vetting procedure by Finnish Security and Intelligence Service
18 hours agoContent Complete

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