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Est. Monthly
Estimated €12,284 - €13,890
Posted December 30, 2025 · 213 days agoLast seen July 30, 2026Est. expiry February 3, 2026

Hardware Verification Engineer

Lead Design Engineer - Verification
Shanghai, China
Onsite · Technology
Full-time · Mid-Level
English
No People Management
3 years experience
How this salary compares
Salary Context: Hardware Verification Engineer

Hover or tap a row for full statistics (EUR / month on this chart).

Salary analysis

Compared with the selected benchmark ("All roles in Shanghai, China"), this listing's salary midpoint is about 6% lower. The offer still falls within the benchmark range (€8,102–€19,831). The listed pay band (€12,284–€13,890) is tighter than the benchmark, which suggests lower salary variability. This benchmark is based on 4 comparable listings.

Monthly salary comparison for Hardware Verification Engineer
MarketLower bound (25th percentile)MedianUpper bound (75th percentile)
All roles in Shanghai, China€8,102/per month€13,087/per month€19,831/per month
Pay in our data — not quoted in ad (Mid-Level)€12,284/per month€13,087/per month€13,890/per month
About the role

Seeking a skilled VLSI Design Verification Engineer with 3-5 years of experience to support SOC projects, collaborating with design and verification teams, developing verification plans, and performing RTL verification using industry-standard methodologies.

Job Details

Responsibilities

  • Develop and execute verification plans for SOC and IP blocks
  • Perform RTL verification using industry-standard methodologies
  • Collaborate with design engineers to address debug issues

Requirements

  • 3-5 years of VLSI/SOC design verification experience
  • Strong expertise in SystemVerilog, UVM, and verification tools
  • Experience with protocols like AMBA, PCIe, USB, MIPI, DDR/LPDDR

Skills & Technologies

SystemVerilogUVMVerification toolsRTL verification
Seen 1 day agoContent Complete
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