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Est. Monthly
Estimated €13,890
Posted July 3, 2026 · 42 days agoLast seen August 13, 2026Est. expiry August 7, 2026

Staff Design Engineer

Staff Design Engineer - SOC
Singapore
Onsite · Electrical Engineering
Full-time · Senior
English
No People Management
Masters
5 years experience
How this salary compares
Salary Context: Staff Design Engineer

Hover or tap a row for full statistics (EUR / month on this chart).

Salary analysis

Compared with the selected benchmark ("All roles in Singapore"), this listing's salary midpoint is about 92% lower. The offer sits below the benchmark range (€13,890–€13,890). Range-width comparison is limited because one of the salary bands is incomplete. This benchmark is based on 1 comparable listings.

Monthly salary comparison for Staff Design Engineer
MarketLower bound (25th percentile)MedianUpper bound (75th percentile)
All roles in Singapore€13,890/per month€13,890/per month€13,890/per month
Pay in our data — not quoted in ad (Senior)€1,158/per month€1,158/per month€1,158/per month
About the role

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at www.silabs.com. What we are looking for: You will be a technical contributor as part of a digital design team developing highly integrated mixed signal SoC’s for low power MCU and Wireless products. Responsibilities: Detailed block architecture/design of digital circuits In-depth understanding of block requirements, system needs, and interfaces Develop block specification, working with cross-functional teams to develop requirements Determine appropriate design approach and partitioning Implement design through RTL coding, adhering to quality guidelines SoC Integration Integration of digital blocks / IP into the SoC infrastructure Development of SoC infrastructure, such as bus matrix, memory interfaces, clocking, power management, reset management Integration of mixed signal and RF IP Verification Block level verification to validate block performance with adherence to requirements using directed, random, and assertion-based methods SoC integration and infrastructure verification Verification of mixed-signal and RF IP integration, including mixed-signal modeling and co-simulation Develop embedded firmware to verify SoC Integration and Validation. Documentation Perform requirement, architecture, design, and verification reviews Develop customer facing reference manual and datasheet material Skills you will need: Minimum Qualifications Bachelor’s or Master’s degree in Electrical Engineering, VLSI, or related field. 5 years of experience Knowledge on AMBA or any other Bus protocols Knowledge on Communication peripherals Experience with artificial intelligence (AI) powered tools and technologies used to enhance productivity, analysis, and decision-making Benefits & Perks: Not only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun. Medical and dental insurance coverage including spouse and child(ren) Bi yearly health screening and flu vaccination Office location is above Tai Seng MRT station #LI-Hybrid #LI-DK1 Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law. At Silicon Labs, we hire and empower great talent to achieve their full potential. By offering challenging projects, technical mentorship, and continuous learning opportunities, we ensure our employees thrive at every stage of their careers. Here, you’ll work alongside some of the industry’s brightest minds, tackling complex problems that deepen your expertise and expand your horizons. Whether you’re building new skills or shaping your career path, we’re dedicated to supporting your growth and celebrating your success every step of the way. Please note that our Company never asks for personal information unrelated to the job application process, such as bank or credit card data and never charges any fees to apply to any jobs. For more information please click here.

Job Details

Responsibilities

  • Detailed block architecture/design of digital circuits
  • In-depth understanding of block requirements, system needs, and interfaces
  • Develop block specification, working with cross-functional teams to develop requirements
  • Determine appropriate design approach and partitioning
  • Implement design through RTL coding, adhering to quality guidelines
  • SoC Integration
  • Integration of digital blocks / IP into the SoC infrastructure
  • Development of SoC infrastructure, such as bus matrix, memory interfaces, clocking, power management, reset management
  • Integration of mixed signal and RF IP
  • Verification
  • Block level verification to validate block performance with adherence to requirements using directed, random, and assertion-based methods
  • SoC integration and infrastructure verification
  • Verification of mixed-signal and RF IP integration, including mixed-signal modeling and co-simulation
  • Develop embedded firmware to verify SoC Integration and Validation.
  • Documentation
  • Perform requirement, architecture, design, and verification reviews
  • Develop customer facing reference manual and datasheet material

Skills & Technologies

RTL codingAMBA or bus protocolsDigital block/IPRF IP integrationMixed-signal modelingCo-simulationEmbedded firmware development

Education Level

Masters
Seen 19 hours agoPartial Schema
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